Designing architectures requires the balancing of multiple system quality objectives. In this paper, we present techniques that support the exploration of the quality properties of...
Egor Bondarev, Michel R. V. Chaudron, Peter H. N. ...
The processes giving rise to an event related potential engage several evoked and induced oscillatory components, which reflect phase or non-phase locked activity throughout the mu...
Run-time reconfigurable logic is a very attractive alterative in the design of SoC. However, configuration overhead can largely decrease the system performance. In this work, we p...
Reduction of both the test suite size and the download time of test vectors is important in today's System-On-a-Chip designs. In this paper, a method for compressing the scan...
Michael J. Knieser, Francis G. Wolff, Christos A. ...
This paper describes the design of a metadata model for capturing presentations developed as part of the VACE project (Video and Audio Capturing and Embedding). VACE is a modular,...