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DATE
2006
IEEE
159views Hardware» more  DATE 2006»
16 years 21 days ago
Distributed loop controller architecture for multi-threading in uni-threaded VLIW processors
Reduced energy consumption is one of the most important design goals for embedded application domains like wireless, multimedia and biomedical. Instruction memory hierarchy has be...
Praveen Raghavan, Andy Lambrechts, Murali Jayapala...
RTCSA
2006
IEEE
16 years 19 days ago
Predictable Interrupt Scheduling with Low Overhead for Real-Time Kernels
In this paper we analyze the traditional model of interrupt management and its inability to incorporate the reliability and temporal predictability demanded by real-time systems. ...
Luis E. Leyva-del-Foyo, Pedro Mejía-Alvarez...
DATE
2005
IEEE
165views Hardware» more  DATE 2005»
16 years 8 days ago
Flexible Hardware/Software Support for Message Passing on a Distributed Shared Memory Architecture
With the advent of multi-processor systems on a chip, the interest for message passing libraries has revived. Message passing helps in mastering the design complexity of parallel ...
Francesco Poletti, Antonio Poggiali, Paul Marchal
RTCSA
2005
IEEE
16 years 6 days ago
Research Issues in the Development of Context-Aware Middleware Architectures
Context-aware middleware encompasses uniform ions and reliable services for common operations, supports for most of the tasks involved in dealing with context, and thus simplifyin...
Hung Quoc Ngo, Anjum Shehzad, Kim Anh Pham Ngoc, S...
ARCS
2005
Springer
16 years 5 days ago
An FPGA Dynamically Reconfigurable Framework for Modular Robotics
Dynamic Reconfiguration has always constituted a challenge for embedded systems designers. Nowadays, technological developments make possible to do it on Xilinx FPGAs, but setting...
Andres Upegui, Rico Moeckel, Elmar Dittrich, Auke ...