Sciweavers

3730 search results - page 410 / 746
» Robust design of embedded systems
Sort
View
SAMOS
2007
Springer
16 years 26 days ago
High-Bandwidth Address Generation Unit
In this paper we describe an efficient data fetch circuitry for retrieving several operands from a n-bank interleaved memory system in a single machine cycle. The proposed address ...
Humberto Calderon, Carlo Galuzzi, Georgi Gaydadjie...
ECRTS
2005
IEEE
16 years 11 days ago
Automated Model-Based Generation of Ravenscar-Compliant Source Code
Graphical languages of various sorts are increasingly used for the specification and the design of high-integrity real-time systems. Their coverage however does not extend with a...
Matteo Bordin, Tullio Vardanega
175
Voted
LCTRTS
2001
Springer
15 years 11 months ago
ILP-based Instruction Scheduling for IA-64
The IA-64 architecture has been designed as a synthesis of VLIW and superscalar design principles. It incorporates typical functionality known from embedded processors as multiply...
Daniel Kästner, Sebastian Winkel
EIT
2009
IEEE
16 years 1 months ago
System-level memory modeling for bus-based memory architecture exploration
—System-level design (SLD) provides a solution to the challenge of increasing design complexity and time-to-market pressure in modern embedded system designs. In this paper, we p...
Zhongbo Cao, Ramon Mercado, Diane T. Rover
DATE
2003
IEEE
87views Hardware» more  DATE 2003»
16 years 1 days ago
A First Step Towards Hw/Sw Partitioning of UML Specifications
This paper proposes a novel methodology tailored to design embedded systems, taking into account the emerging market needs, such as hw/sw partitioning, object-oriented specificati...
William Fornaciari, P. Micheli, Fabio Salice, L. Z...