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» Robust design of embedded systems
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ISSS
1996
IEEE
125views Hardware» more  ISSS 1996»
15 years 11 months ago
Size-Constrained Code Placement for Cache Miss Rate Reduction
In design of an embedded system with a cache, it is important to minimize the cache miss rate to reduce the power consumption as well as to improvethe performance of the system. W...
Hiroyuki Tomiyama, Hiroto Yasuura
CODES
2004
IEEE
15 years 10 months ago
Power-aware communication optimization for networks-on-chips with voltage scalable links
Networks-on-Chip (NoC) is emerging as a practical development platform for future systems-on-chip products. We propose an energyefficient static algorithm which optimizes the ener...
Dongkun Shin, Jihong Kim
ISOLA
2010
Springer
15 years 5 months ago
An Interface Algebra for Estimating Worst-Case Traversal Times in Component Networks
Abstract. Interface-based design relies on the idea that different components of a system may be developed independently and a system designer can connect them together only if th...
Nikolay Stoimenov, Samarjit Chakraborty, Lothar Th...
DAC
2005
ACM
16 years 7 months ago
Optimal procrastinating voltage scheduling for hard real-time systems
This paper presents an optimal procrastinating voltage scheduling (OP-DVS) for hard real-time systems using stochastic workload information. Algorithms are presented for both sing...
Yan Zhang, Zhijian Lu, John Lach, Kevin Skadron, M...
148
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SOUPS
2009
ACM
16 years 1 months ago
Ubiquitous systems and the family: thoughts about the networked home
Developments in ubiquitous and pervasive computing herald a future in which computation is embedded into our daily lives. Such a vision raises important questions about how people...
Linda Little, Elizabeth Sillence, Pamela Briggs