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IJSEKE
2000
111views more  IJSEKE 2000»
15 years 6 months ago
An Approach to Quantitative Software Architecture Sensitivity Analysis
Software architectures are often claimed to be robust. However, there is no explicit and concrete definition of software architecture robustness. This paper gives a definition of ...
Chung-Horng Lung, Kalai Kalaichelvan
DSD
2010
IEEE
110views Hardware» more  DSD 2010»
15 years 6 months ago
A Predictable Multiprocessor Design Flow for Streaming Applications with Dynamic Behaviour
—The design of new embedded systems is getting more and more complex as more functionality is integrated into these systems. To deal with the design complexity, a predictable des...
Sander Stuijk, Marc Geilen, Twan Basten
SAMOS
2010
Springer
15 years 5 months ago
Cycle-accurate performance modelling in an ultra-fast just-in-time dynamic binary translation instruction set simulator
—Instruction set simulators (ISS) are vital tools for compiler and processor architecture design space exploration and verification. State-of-the-art simulators using just-in-ti...
Igor Böhm, Björn Franke, Nigel P. Topham
MSE
2005
IEEE
137views Hardware» more  MSE 2005»
16 years 8 days ago
Teaching SoC Design in a Project-Oriented Course Based on Robotics
The fast growing complexity and short time-tomarket of embedded systems designs, besides the great increase in capacity of today’s chips, are mobilizing the industry towards to ...
Abner Correa Barros, Pericles Lima, Juliana Xavier...
CODES
2004
IEEE
15 years 10 months ago
Benchmark-based design strategies for single chip heterogeneous multiprocessors
Single chip heterogeneous multiprocessors are arising to meet the computational demands of portable and handheld devices. These computing systems are not fully custom designs trad...
JoAnn M. Paul, Donald E. Thomas, Alex Bobrek