Technology extrapolation -- the calibration and prediction of achievable design in future technology generations ? drives the evolution of VLSI system architectures, design method...
Andrew E. Caldwell, Yu Cao, Andrew B. Kahng, Farin...
Latency-insensitive systems were recently proposed by Carloni et al. as a correct-by-construction methodology for single-clock system-on-a-chip (SoC) design using predesigned IP b...
Abstract— A common approach to designing feedback controllers for nonlinear partial differential equations (PDEs) is to linearize the system about an equilibrium and use the line...
A key problem that arises in System-on-a-Chip (SOC) designs of today is the Chip-level Clock Tree Synthesis (CCTS). CCTS is done by merging all the clock trees belonging to differ...
This paper introduces a continuous model for Multi-cellular Developmental Design. The cells are fixed on a 2D grid and exchange ”chemicals” with their neighbors during the gr...
Alexandre Devert, Nicolas Bredeche, Marc Schoenaue...