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DSD
2004
IEEE
136views Hardware» more  DSD 2004»
15 years 11 months ago
FPGA Based Design of the Railway's Interlocking Equipments
This paper describes the architecture of a safety system of the railway's interlocking equipment, which has been developed for Czech railways. The system will be used for the...
Radek Dobias, Hana Kubatova
DAC
1997
ACM
15 years 11 months ago
System-Level Synthesis of Low-Power Hard Real-Time Systems
We present a system-level approach for power optimization under a set of user specified costs and timing constraints of hard real-time designs. The approach optimizes all three d...
Darko Kirovski, Miodrag Potkonjak
CIC
2006
124views Communications» more  CIC 2006»
15 years 9 months ago
Chaotic Systems Synchronization in Secure Communication Systems
In this paper, synchronization of two chaotic signals is studied and analyzed. A nonlinear recursive backstepping scheme is utilized to design an appropriate control input signal ...
Ahmad Harb, Wajdi Ahmad
DATE
2003
IEEE
119views Hardware» more  DATE 2003»
16 years 27 days ago
IPSIM: SystemC 3.0 Enhancements for Communication Refinement
Refinement is a key methodology for SoC design. The proposed IPSIM design environment, based on a C++ modeling library developed on top of SystemC 3.0, supports an object-oriented...
Marcello Coppola, Stephane Curaba, Miltos D. Gramm...
CVPR
2012
IEEE
13 years 10 months ago
FREAK: Fast Retina Keypoint
A large number of vision applications rely on matching keypoints across images. The last decade featured an arms-race towards faster and more robust keypoints and association algo...
Alexandre Alahi, Raphael Ortiz, Pierre Vandergheyn...