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ISVLSI
2007
IEEE
181views VLSI» more  ISVLSI 2007»
16 years 1 months ago
Code-coverage Based Test Vector Generation for SystemC Designs
Abstract— Time-to-Market plays a central role on System-ona-Chip (SoC) competitiveness and the quality of the final product is a matter of concern as well. As SoCs complexity in...
Alair Dias Jr., Diógenes Cecilio da Silva J...
IPPS
2006
IEEE
16 years 1 months ago
Design flow for optimizing performance in processor systems with on-chip coarse-grain reconfigurable logic
A design flow for processor platforms with on-chip coarse-grain reconfigurable logic is presented. The reconfigurable logic is realized by a 2-Dimensional Array of Processing Elem...
Michalis D. Galanis, Grigoris Dimitroulakos, Const...
SBCCI
2003
ACM
213views VLSI» more  SBCCI 2003»
16 years 13 days ago
Algorithms and Tools for Network on Chip Based System Design
Network on Chip (NoC) is a new paradigm for designing core based System on Chips. It supports high degree of reusability and is scalable. In this paper, an efficient Two-Step Gene...
Tang Lei, Shashi Kumar
ITCC
2002
IEEE
16 years 3 days ago
Design and Generation of Adaptable Web Information Systems with KIWIS
Web-based Information Systems (WIS) are now widely used for diffusing and processing information over the network. Methodological guidelines which assist WIS developers in their t...
Marlène Villanova-Oliver, Jérô...
IH
1999
Springer
15 years 11 months ago
On the Design of a Watermarking System: Considerations and Rationales
This paper summarizes considerations and rationales for the design of a watermark detector. In particular, we relate watermark detection to the problem of signal detection in the p...
Jean-Paul M. G. Linnartz, Geert Depovere, Ton Kalk...