This paper gives a semantics for discrete-event (DE) models that generalizes that of synchronous/reactive (SR) languages, and a continuous-time (CT) semantics that generalizes the...
Unified Modeling Language (UML) 2.0 is emerging in the area of embedded system design. This paper presents a new UML 2.0 profile - called TUT-Profile - that introduces a set of st...
This paper describes the authors experience with teaching VHDL (and more recently, Verilog) to undergraduate and graduate students at WPI and to engineers through various short co...
This paper describes issues in the design of IT-centric trouble-ticketing applications. Two prototypes are presented. The first introduces a user-centric, webaccessible thick clie...
This paper concerns automatic hardware synthesis from data flow graph (DFG) specification in system level design. In the presented design methodology, each node of a data flow gra...