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ISCAS
2003
IEEE
153views Hardware» more  ISCAS 2003»
16 years 5 days ago
A VLSI model of range-tuned neurons in the bat echolocation system
The neural computations that support bat echolocation are of great interest to both neuroscientists and engineers, due to the complex and extremely time-constrained nature of the ...
Matthew Cheely, Timothy K. Horiuchi
ISCAS
2003
IEEE
105views Hardware» more  ISCAS 2003»
16 years 5 days ago
Algorithmic partial analog-to-digital conversion in mixed-signal array processors
We present an algorithmic analog-to-digital converter (ADC) architecture for large-scale parallel quantization of internally analog variables in externally digital array processor...
Roman Genov, Gert Cauwenberghs
ISCAS
2003
IEEE
88views Hardware» more  ISCAS 2003»
16 years 5 days ago
Load cell response correction using analog adaptive techniques
Load cell response correction can be used to speed up the process of measurement. This paper investigates the application of analog adaptive techniques in load cell response corre...
Mehdi Jafaripanah, Bashir M. Al-Hashimi, Neil M. W...
ISCAS
2003
IEEE
183views Hardware» more  ISCAS 2003»
16 years 5 days ago
Polyphase IIR filter banks for subband adaptive echo cancellation applications
Polyphase IIR structures are known to be very attractive for very high performance filters that can be designed using very few coefficients. This combined with their reduced sensi...
Artur Krukowski, Izzet Kale
ISCAS
2003
IEEE
172views Hardware» more  ISCAS 2003»
16 years 5 days ago
Efficient symbol synchronization techniques using variable FIR or IIR interpolation filters
Maximum Likelihood estimation theory can be used to develop optimal timing recovery schemes for digital communication systems. Tunable digital interpolation filters are commonly ...
Martin Makundi, Timo I. Laakso