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FPGA
2004
ACM
117views FPGA» more  FPGA 2004»
15 years 11 months ago
A magnetoelectronic macrocell employing reconfigurable threshold logic
In this paper, we introduce a reconfigurable fabric based around a new class of circuit element: the hybrid Hall effect (HHE) magnetoelectronic device. Because they incorporate a ...
Steve Ferrera, Nicholas P. Carter
FPGA
2004
ACM
121views FPGA» more  FPGA 2004»
15 years 11 months ago
Highly pipelined asynchronous FPGAs
We present the design of a high-performance, highly pipelined asynchronous FPGA. We describe a very fine-grain pipelined logic block and routing interconnect architecture, and sh...
John Teifel, Rajit Manohar
FPGA
2004
ACM
147views FPGA» more  FPGA 2004»
15 years 11 months ago
The SFRA: a corner-turn FPGA architecture
FPGAs normally operate at whatever clock rate is appropriate for the loaded configuration. When FPGAs are used as computational devices in a larger system, however, it is better ...
Nicholas Weaver, John R. Hauser, John Wawrzynek
FPL
2004
Springer
101views Hardware» more  FPL 2004»
15 years 11 months ago
The Chess Monster Hydra
Abstract. With the help of the FPGA technology, the boarder between hardand software has vanished. It is now possible to develop complex designs and fine grained parallel applicat...
Chrilly Donninger, Ulf Lorenz
ICCS
2004
Springer
15 years 11 months ago
Platform-Independent Cache Optimization by Pinpointing Low-Locality Reuse
Abstract. For many applications, cache misses are the primary performance bottleneck. Even though much research has been performed on automatically optimizing cache behavior at the...
Kristof Beyls, Erik H. D'Hollander
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