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ASAP
2007
IEEE
219views Hardware» more  ASAP 2007»
16 years 25 days ago
SIMD Vectorization of Histogram Functions
Existing SIMD extensions cannot efficiently vectorize the histogram function due to memory collisions. We propose two techniques to avoid this problem. In the first, a hierarchi...
Asadollah Shahbahrami, Ben H. H. Juurlink, Stamati...
ASAP
2007
IEEE
95views Hardware» more  ASAP 2007»
16 years 25 days ago
Performance Evaluation of Probe-Send Fault-tolerant Network-on-chip Router
With increasing reliability concerns for current and next generation VLSI technologies, fault-tolerance is fast becoming an integral part of system-on-chip and multicore architect...
Sumit D. Mediratta, Jeffrey T. Draper
CODES
2007
IEEE
16 years 25 days ago
Improved response time analysis of tasks scheduled under preemptive Round-Robin
Round-Robin scheduling is the most popular time triggered scheduling policy, and has been widely used in communication networks for the last decades. It is an efficient schedulin...
Razvan Racu, Li Li, Rafik Henia, Arne Hamann, Rolf...
DFT
2007
IEEE
103views VLSI» more  DFT 2007»
16 years 25 days ago
Reliable Network-on-Chip Using a Low Cost Unequal Error Protection Code
The network-on-chip (NoC) paradigm is seen as a way of facilitating the integration of a large number of computational and storage blocks on a chip to meet several performance and...
Avijit Dutta, Nur A. Touba
DFT
2007
IEEE
105views VLSI» more  DFT 2007»
16 years 25 days ago
A Refined Electrical Model for Particle Strikes and its Impact on SEU Prediction
Decreasing feature sizes have led to an increased vulnerability of random logic to soft errors. A particle strike may cause a glitch or single event transient (SET) at the output ...
Sybille Hellebrand, Christian G. Zoellin, Hans-Joa...
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