7262 search results - page 1137 / 1453 » Reversible Computer Hardware |
177
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DAC
1997
ACM
15 years 10 months ago
1997
ACM
—Many application-specific architectures provide indirect addressing modes with auto-increment/decrement arithmetic. Since these architectures generally do not feature an indexe...
187
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DAC
1997
ACM
15 years 10 months ago
1997
ACM
The design process for xed-point implementations either in software or in hardware requires a bit-true speci cation of the algorithm in order to analyze quantization e ects on an...
196
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HPCA
1996
IEEE
15 years 10 months ago
1996
IEEE
We have investigated the register file requirements of dynamically scheduled processors using register renaming and dispatch queues running the SPEC92 benchmarks. We looked at pro...
150
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HPCA
1996
IEEE
15 years 10 months ago
1996
IEEE
The current multiprocessors such asCray T3D support interprocessor communication using partitioned dimension-order routers (PDRs). In a PDR implementation, the routing logic and sw...
165
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IPPS
1996
IEEE
15 years 10 months ago
1996
IEEE
Brewer and Kuszmaul [BK94] demonstrated how barriers and traffic interleaving can alleviate the problem of bulk-transfer performance degradation on the Thinking Machines CM-5, by ...