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178
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ICS
1999
Tsinghua U.
15 years 11 months ago
1999
Tsinghua U.
Hydra is a chip multiprocessor (CMP) with integrated support for thread-level speculation. Thread-level speculation provides a way to parallelize sequential programs without the n...
168
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HPCA
1998
IEEE
15 years 11 months ago
1998
IEEE
As we look to the future, and the prospect of a billion transistors on a chip, it seems inevitable that microprocessors will exploit having multiple parallel threads. To achieve t...
204
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HPCA
1998
IEEE
15 years 11 months ago
1998
IEEE
The performance of a concurrent multithreaded architectural model, called superthreading 15 , is studied in this paper. It tries to integrate optimizing compilation techniques and...
167
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ICNP
1998
IEEE
15 years 11 months ago
1998
IEEE
Advances in ber-optic and VLSI technology have led to the emergence of very high-speed networks based on Asynchronous Transfer Mode ATM. The time required to transmit the data int...
195
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RT
1999
Springer
15 years 11 months ago
1999
Springer
Interactive rendering requires rapid visual feedback. The render cache is a new method for achieving this when using high-quality pixel-oriented renderers such as ray tracing that...