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IPPS
2006
IEEE
16 years 22 days ago
Elementary block based 2-dimensional dynamic and partial reconfiguration for Virtex-II FPGAs
The development of Field Programmable Gate Arrays (FPGAs) had tremendous improvements in the last few years. They were extended from simple logic circuits to complex Systems-on-Ch...
Michael Hübner, Christian Schuck, Jürgen...
IPPS
2006
IEEE
16 years 22 days ago
Improving cache locality for thread-level speculation
With the advent of chip-multiprocessors (CMPs), Thread-Level Speculation (TLS) remains a promising technique for exploiting this highly multithreaded hardware to improve the perfo...
Stanley L. C. Fung, J. Gregory Steffan
IPPS
2006
IEEE
16 years 22 days ago
Collective operations in NEC's high-performance MPI libraries
We give an overview of the algorithms and implementations in the high-performance MPI libraries MPI/SX and MPI/ES of some of the most important collective operations of MPI (the M...
Hubert Ritzdorf, Jesper Larsson Träff
IPPS
2006
IEEE
16 years 22 days ago
A configuration memory hierarchy for fast reconfiguration with reduced energy consumption overhead
Currently run-time reconfigurable hardware offers really attractive features for embedded systems, such as flexibility, reusability, high performance and, in some cases, low-power...
Elena Perez Ramo, Javier Resano, Daniel Mozos, Fra...
IPPS
2006
IEEE
16 years 22 days ago
Oblivious parallel probabilistic channel utilization without control channels
The research interest in sensor nets is still growing because they simplify data acquisition in many applications. If hardware resources are very sparse, routing algorithms cannot...
Christian Schindelhauer
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