7262 search results - page 1068 / 1453 » Reversible Computer Hardware |
181
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CF
2006
ACM
15 years 10 months ago
2006
ACM
This paper presents our experience mapping OpenMP parallel programming model to the IBM Cyclops-64 (C64) architecture. The C64 employs a many-core-on-a-chip design that integrates...
180
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EMSOFT
2006
Springer
15 years 10 months ago
2006
Springer
Upper bounds on worst-case execution times, which are commonly called WCET, are a prerequisite for validating the temporal correctness of tasks in a real-time system. Due to the e...
217
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LCTRTS
2000
Springer
15 years 10 months ago
2000
Springer
The control system of many complex mechatronic products requires for each task the Worst Case Execution Time (WCET), which is needed for the scheduler's admission tests and su...
170
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ASAP
1997
IEEE
15 years 10 months ago
1997
IEEE
In the framework of perfect loop nests with uniform dependences, tiling has been extensively studied as a source-to-source program transformation. Little work has been devoted to ...
181
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ICCAD
1995
IEEE
15 years 10 months ago
1995
IEEE
ng certain electrical noise and power constraints.Abstract: We present a new delay model for use in logic synthesis. A traditional model treats the area of a library cell as consta...