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155
Voted
ICCAD
2004
IEEE
16 years 3 months ago
2004
IEEE
Abstract— High-level synthesis (HLS) of memory-intensive applications has featured several innovations in terms of enhancements made to the basic memory organization and data lay...
157
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ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
Placement is one of the most important steps in the RTLto-GDSII synthesis process, as it directly defines the interconnects, which have become the bottleneck in circuit and syste...
176
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ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
— Memory-intensive applications present unique challenges to an ASIC designer in terms of the choice of memory organization, memory size requirements, bandwidth and access latenc...
187
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ICCAD
2003
IEEE
16 years 3 months ago
2003
IEEE
Routing for FPGAs has been a very challenging problem due to the limitation of routing resources. Although the FPGA routing problem has been researched extensively, most algorithm...
179
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ICCAD
2003
IEEE
2003
IEEE
Multi.Objective Hypergraph Partitioning Algorithms for Cut and Maximum Subdomain Degree Minimization
16 years 3 months ago
In this paper we present a family of multi-objective hypergraph partitioning algorithms based on the multilevel paradigm, which are capable of producing solutions in which both th...