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CODES
2009
IEEE
16 years 1 months ago
Using binary translation in event driven simulation for fast and flexible MPSoC simulation
In this paper, we investigate the use of instruction set simulators (ISS) based on binary translation to accelerate full timed multiprocessor system simulation at transaction leve...
Marius Gligor, Nicolas Fournel, Frédé...
DATE
2009
IEEE
159views Hardware» more  DATE 2009»
16 years 1 months ago
Design and implementation of a database filter for BLAST acceleration
— BLAST is a very popular Computational Biology algorithm. Since it is computationally expensive it is a natural target for acceleration research, and many reconfigurable archite...
Panagiotis Afratis, Constantinos Galanakis, Euripi...
DATE
2009
IEEE
163views Hardware» more  DATE 2009»
16 years 1 months ago
Fixed points for multi-cycle path detection
—Accurate timing analysis is crucial for obtaining the optimal clock frequency, and for other design stages such as power analysis. Most methods for estimating propagation delay ...
Vijay D'Silva, Daniel Kroening
SIGMETRICS
2009
ACM
131views Hardware» more  SIGMETRICS 2009»
16 years 1 months ago
Modeling channel popularity dynamics in a large IPTV system
Understanding the channel popularity or content popularity is an important step in the workload characterization for modern information distribution systems (e.g., World Wide Web,...
Tongqing Qiu, Zihui Ge, Seungjoon Lee, Jia Wang, Q...
ISQED
2006
IEEE
147views Hardware» more  ISQED 2006»
16 years 26 days ago
Compact Reduced Order Modeling for Multiple-Port Interconnects
— In this paper, we propose an efficient model order reduction (MOR) algorithm, called MTermMOR, for modeling interconnect circuits with large number of external ports. The prop...
Pu Liu, Sheldon X.-D. Tan, Bruce McGaughy, Lifeng ...
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