2778 search results - page 82 / 556 » Reuse Technique in Hardware Design |
167
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SAMOS
2010
Springer
15 years 4 months ago
2010
Springer
Abstract—Geometric Algebra (GA), a generalization of quaternions, is a very powerful form for intuitively expressing and manipulating complex geometric relationships common to en...
117
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ITC
2000
IEEE
15 years 10 months ago
2000
IEEE
—This paper presents Algorithm-level REcomputing with Shifted Operands (ARESO), which is a new register transfer (RT) level time redundancy-based concurrent error detection (CED)...
222
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ISPD
2005
ACM
15 years 11 months ago
2005
ACM
Placement is a critical component of today's physical synthesis flow with tremendous impact on the final performance of VLSI designs. However, it accounts for a significant p...
151
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MICRO
1998
IEEE
15 years 10 months ago
1998
IEEE
The inherent instruction-level parallelism (ILP) of current applications (specially those based on floating point computations) has driven hardware designers and compilers writers...
186
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ICSE
1992
IEEE-ACM
15 years 10 months ago
1992
IEEE-ACM
Although there is much interest in creating libraries of well-designed, thoroughly-tested classes that can be confidently reused for many applications, few class testing technique...