2778 search results - page 81 / 556 » Reuse Technique in Hardware Design |
168
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ICES
2000
Springer
15 years 9 months ago
2000
Springer
Testing is a key issue in the design and production of digital circuits: the adoption of BIST (Built-In Self-Test) techniques is increasingly popular, but requires efficient algori...
181
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ET
2002
15 years 6 months ago
2002
The combination of higher quality requirements and sensitivity of high performance circuits to delay defects has led to an increasing emphasis on delay testing of VLSI circuits. A...
154
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PAIRING
2010
Springer
15 years 4 months ago
2010
Springer
This paper presents a novel method for designing compact yet efficient hardware implementations of the Tate pairing over supersingular curves in small characteristic. Since such cu...
141
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HICSS
2003
IEEE
15 years 11 months ago
2003
IEEE
Abstract— This paper presents a framework for verifying compilation tools for parametrised hardware libraries with placement information. Such libraries are captured in Pebble, a...
187
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ANNPR
2006
Springer
15 years 8 months ago
2006
Springer
Abstract. Recently, the authors described a training method for a convolutional neural network of threshold neurons. Hidden layers are trained by by clustering, in a feed-forward m...