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VTS
1998
IEEE
88views Hardware» more  VTS 1998»
15 years 10 months ago
Transition Maximization Techniques for Enhancing the Two-Pattern Fault Coverage of Pseudorandom Test Pattern Generators
This paper presents simulation evidence supporting the use of bit transition maximization techniques in the design of hardware test pattern generators TPGs. Bit transition maximiz...
Bruce F. Cockburn, Albert L.-C. Kwong
DATE
2003
IEEE
130views Hardware» more  DATE 2003»
15 years 11 months ago
A Technique for High Ratio LZW Compression
Reduction of both the test suite size and the download time of test vectors is important in today's System-On-a-Chip designs. In this paper, a method for compressing the scan...
Michael J. Knieser, Francis G. Wolff, Christos A. ...
DAC
2003
ACM
16 years 7 months ago
An adaptive window-based susceptance extraction and its efficient implementation
The determination of the set (or window) of segments that are inductively coupled to a significant degree with a given segment plays a fundamental role in window-based techniques ...
Guoan Zhong, Cheng-Kok Koh, Venkataramanan Balakri...
CODES
1999
IEEE
15 years 10 months ago
Using codesign techniques to support analog functionality
With the growth of System on a Chip (SoC), the functionality of analog components must also be considered in the design process. This paper describes some of the design implementa...
Francis G. Wolff, Michael J. Knieser, Daniel J. We...
DATE
2003
IEEE
120views Hardware» more  DATE 2003»
15 years 11 months ago
SystemC-VHDL Co-Simulation and Synthesis in the HW Domain
Embedded systems design requires the development of complex HW modules to cope with the most stringent timing constraints of the specifications. This implies the need to update an...
Massimo Bombana, Francesco Bruschi