2778 search results - page 69 / 556 » Reuse Technique in Hardware Design |
167
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EUROMICRO
1998
IEEE
15 years 10 months ago
1998
IEEE
This paper introduces thread integration, a new method of providing low-cost concurrency for microcontrollers and microprocessors. This post-pass compiler technology effectively i...
154
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VIS
2005
IEEE
16 years 7 months ago
2005
IEEE
We present the application of hardware accelerated volume rendering algorithms to the simulation of radiographs as an aid to scientists designing experiments, validating simulatio...
109
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ISCAS
2002
IEEE
15 years 11 months ago
2002
IEEE
A time-shifted correlated double sampling (CDS) technique is used to compensate for the finite opamp dc gain in the context of a pipelined analog-to-digital converter (ADC). This...
143
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ITC
2002
IEEE
15 years 11 months ago
2002
IEEE
1 This paper presents a test input data compression technique, which can be used to reduce input test data volume, test time, and the number of required tester channels. The techni...
157
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HVC
2005
Springer
15 years 11 months ago
2005
Springer
We present several algorithms for simultaneous SAT (propositional satisfiability) based model checking of safety properties. More precisely, we focus on Bounded Model Checking and ...