2778 search results - page 60 / 556 » Reuse Technique in Hardware Design |
115
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ASPDAC
1999
ACM
15 years 10 months ago
1999
ACM
- We describe an integrated model of the hardware and the battery sub-systems in batterypowered VLSI systems. We demonstrate that, under this model and for a fixed operating voltag...
142
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DATE
2002
IEEE
15 years 11 months ago
2002
IEEE
In this paper, we present an efficient methodology to validate high performance algorithms and prototype them using reconfigurable hardware. We follow a strict topdown Hardware/So...
180
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ASAP
2000
IEEE
15 years 9 months ago
2000
IEEE
Exploiting instruction-level parallelism (ILP) is extremely important for achieving high performance in application specific instruction set processors (ASIPs) and embedded proces...
150
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DSN
2002
IEEE
15 years 11 months ago
2002
IEEE
A virtual duplex system (VDS) can be used to increase safety without the use of structural redundancy on a single machine. If a deterministic program P is calculating a given func...
152
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PDP
2010
IEEE
15 years 10 months ago
2010
IEEE
In the last years high performance processor designs have evolved toward Chip-Multiprocessor (CMP) architectures that implement multiple processing cores on a single die. As the nu...