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» Reuse Technique in Hardware Design
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DAC
2005
ACM
16 years 7 months ago
MP core: algorithm and design techniques for efficient channel estimation in wireless applications
Channel estimation and multiuser detection are enabling technologies for future generations of wireless applications. However, sophisticated algorithms are required for accurate c...
Yan Meng, Andrew P. Brown, Ronald A. Iltis, Timoth...
WISA
2007
Springer
16 years 6 days ago
Iteration Bound Analysis and Throughput Optimum Architecture of SHA-256 (384, 512) for Hardware Implementations
Abstract. The hash algorithm forms the basis of many popular cryptographic protocols and it is therefore important to find throughput optimal implementations. Though there have be...
Yong Ki Lee, Herwin Chan, Ingrid Verbauwhede
HOST
2009
IEEE
16 years 25 days ago
Secure IP-Block Distribution for Hardware Devices
—EDA vendors have proposed a standard for the sharing of IP among vendors to be used in the design and development of IP for FPGAs. Although, we do not propose any attacks, we sh...
Jorge Guajardo, Tim Güneysu, Sandeep S. Kumar...
DATE
2004
IEEE
138views Hardware» more  DATE 2004»
15 years 9 months ago
Microarchitecture Development via Metropolis Successive Platform Refinement
Productivity data for IC designs indicates an exponential increase in design time and cost with the number of elements that are to be included in a device. Present applications re...
Douglas Densmore, Sanjay Rekhi, Alberto L. Sangiov...
ASPDAC
2001
ACM
185views Hardware» more  ASPDAC 2001»
15 years 9 months ago
Power optimization and management in embedded systems
Power-efficient design requires reducing power dissipation in all parts of the design and during all stages of the design process subject to constraints on the system performance ...
Massoud Pedram