2778 search results - page 54 / 556 » Reuse Technique in Hardware Design |
157
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DATE
2008
IEEE
16 years 17 days ago
2008
IEEE
Transaction Level Modeling (TLM) is an emerging design practice for overcoming increasing design complexity. It aims at simplifying the design flow of embedded systems ning and v...
156
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DELTA
2006
IEEE
15 years 9 months ago
2006
IEEE
The mapping of image processing algorithms to hardware is complicated by several hardware constraints including limited processing time, limited access to data and limited resourc...
201
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DATE
2010
IEEE
15 years 4 months ago
2010
IEEE
—Starting from sequential programs, we present an approach combining data reuse, multi-level MapReduce, and pipelining to automatically find the most power-efficient designs th...
160
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VISUALIZATION
2005
IEEE
15 years 11 months ago
2005
IEEE
The rapid increase in the performance of graphics hardware, coupled with recent improvements in its programmability, have made graphics hardware a compelling platform for computat...
155
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CODES
2002
IEEE
15 years 11 months ago
2002
IEEE
Eclipse defines a heterogeneous multiprocessor architecture template for data-dependent stream processing. Intended as a scalable and flexible subsystem of forthcoming media-proce...