2778 search results - page 51 / 556 » Reuse Technique in Hardware Design |
162
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ASPDAC
2005
ACM
15 years 8 months ago
2005
ACM
Abstract— In this paper, we present several techniques for lowpower design, including a descriptor-based low-power scheduling algorithm, design of dynamic voltage generator, and ...
167
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DAC
1997
ACM
15 years 10 months ago
1997
ACM
Novel test bench techniques are required to cope with a functional test complexity which is predicted to grow much more strongly than design complexity. Our test bench approach at...
148
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ARC
2008
Springer
15 years 8 months ago
2008
Springer
Abstract. In this paper, we present the PARO design tool for the automated hardware synthesis of massively parallel embedded architectures for given dataflow dominant applications....
140
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ASPDAC
2006
ACM
16 years 2 days ago
2006
ACM
Recent research results have seen the application of parallelizing techniques to high-level synthesis. In particular, the effect of speculative code transformations on mixed contr...
188
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ICFEM
2010
Springer
15 years 4 months ago
2010
Springer
Abstract. Due to new emerging areas in the communication field there is a constant need for the design of novel communication protocols. This demands techniques for a rapid and eff...