2778 search results - page 50 / 556 » Reuse Technique in Hardware Design |
166
click to vote
ASPDAC
2012
ACM
14 years 1 months ago
2012
ACM
— Since re-designing and re-optimizing existing logic, memory, and IP blocks in a 3D fashion significantly increases design cost, nearterm three-dimensional integrated circuit (...
147
click to vote
CODES
2006
IEEE
16 years 4 days ago
2006
IEEE
The ability to do fine grain power management via local voltage selection has shown much promise via the use of Voltage/ Frequency Islands (VFIs). VFI-based designs combine the a...
147
click to vote
VLSID
2008
IEEE
16 years 6 months ago
2008
IEEE
With increasing adoption of Electronic System Level (ESL) tools, effective design and validation time has reduced to a considerable extent. Cosimulation is found to be a principal...
154
click to vote
EH
2003
IEEE
15 years 11 months ago
2003
IEEE
The paper deals with a new approach to the design of adaptive hardware using common Field Programmable Gate Arrays (FPGA). The ultimate aim is to develop evolvable IP (Intellectua...
153
click to vote
DATE
1997
IEEE
15 years 10 months ago
1997
IEEE
This paper presents a testability analysis and improvement technique for the controller of an RT level design. It detects hard-to-reachstates by analyzing both the data path and t...