2778 search results - page 485 / 556 » Reuse Technique in Hardware Design |
157
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ICCAD
2008
IEEE
16 years 23 days ago
2008
IEEE
— The area-I/O flip-chip package provides a high chip-density solution to the demand of more I/O’s in VLSI designs; it can achieve smaller package size, shorter wirelength, an...
176
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ISCA
2007
IEEE
16 years 19 days ago
2007
IEEE
Server consolidation is becoming an increasingly popular technique to manage and utilize systems. This paper develops CMP memory systems for server consolidation where most sharin...
150
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DATE
2005
IEEE
15 years 12 months ago
2005
IEEE
attributed to the high regularity of memories, PAs and FPGAs, and the ease with which they can be tested and reconfigured to avoid faulty elements. Digital microfluidicsbased bioch...
162
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ISPD
2004
ACM
15 years 11 months ago
2004
ACM
Automated cell placement is a critical problem in VLSI physical design. New analytical placement methods that simultaneously spread cells and optimize wirelength have recently rec...
175
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LCTRTS
2004
Springer
15 years 11 months ago
2004
Springer
This paper presents Spinach, a new simulator toolset specifically designed to target programmable network interface architectures. Spinach models both system components that are ...