Sciweavers

2778 search results - page 472 / 556
» Reuse Technique in Hardware Design
Sort
View
CIT
2004
Springer
15 years 11 months ago
FPGA Based Implementation of an Invisible-Robust Image Watermarking Encoder
Abstract. Both encryption and digital watermarking techniques need to be incorporated in a digital rights management framework to address different aspects of content management. W...
Saraju P. Mohanty, Renuka Kumara C., Sridhara Naya...
DAC
2003
ACM
15 years 11 months ago
Test application time and volume compression through seed overlapping
We propose in this paper an extension on the Scan Chain Concealment technique to further reduce test time and volume requirement. The proposed methodology stems from the architect...
Wenjing Rao, Ismet Bayraktaroglu, Alex Orailoglu
ICES
2003
Springer
103views Hardware» more  ICES 2003»
15 years 11 months ago
Fault Tolerance via Endocrinologic Based Communication for Multiprocessor Systems
The communication mechanism used by the biological cells of higher animals is an integral part of an organisms ability to tolerate cell deficiency or loss. The massive redundancy ...
Andrew J. Greensted, Andrew M. Tyrrell
IPPS
2000
IEEE
15 years 10 months ago
Image Layer Decomposition for Distributed Real-Time Rendering on Clusters
We propose a novel work partitioning technique, Image Layer Decomposition (ILD), designed specifically to support distributed real-time rendering on commodity clusters. ILD has s...
Thu D. Nguyen, John Zahorjan
DAC
2005
ACM
15 years 8 months ago
Sign bit reduction encoding for low power applications
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi