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» Reuse Technique in Hardware Design
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ISLPED
2006
ACM
100views Hardware» more  ISLPED 2006»
16 years 9 days ago
Selective writeback: exploiting transient values for energy-efficiency and performance
Today’s superscalar microprocessors use large, heavily-ported physical register files (RFs) to increase the instruction throughput. The high complexity and power dissipation of ...
Deniz Balkan, Joseph J. Sharkey, Dmitry Ponomarev,...
SAC
2006
ACM
16 years 9 days ago
Building the functional performance model of a processor
In this paper, we present an efficient procedure for building a piecewise linear function approximation of the speed function of a processor with hierarchical memory structure. Th...
Alexey L. Lastovetsky, Ravi Reddy, Robert Higgins
ACSC
2005
IEEE
15 years 12 months ago
Large Object Segmentation with Region Priority Rendering
The Address Recalculation Pipeline is a hardware architecture designed to reduce the end-to-end latency suffered by immersive Head Mounted Display virtual reality systems. A deman...
Yang-Wai Chow, Ronald Pose, Matthew Regan
ICMCS
2005
IEEE
158views Multimedia» more  ICMCS 2005»
15 years 12 months ago
Processor Load Analysis for Mobile Multimedia Streaming: The Implication of Power Reduction
The software codec on mobile device introduces significant power consumption because the energy efficiency of general processor based system is much lower than that of the dedicat...
Min Li, Xiaobo Wu, Zihua Guo, Richard Yao, Xiaolan...
UIST
2004
ACM
15 years 11 months ago
Using light emitting diode arrays as touch-sensitive input and output devices
Light Emitting Diodes (LEDs) offer long life, low cost, efficiency, brightness, and a full range of colors. Because of these properties, they are widely used for simple displays i...
Scott E. Hudson