2778 search results - page 40 / 556 » Reuse Technique in Hardware Design |
128
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ISCAS
2007
IEEE
16 years 10 days ago
2007
IEEE
— We present a novel MBU-tolerant design, which utilizes layout-based interleaving and multiple-node disruption tolerant memory latches. This approach protects against grazing in...
196
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FPGA
2008
ACM
15 years 7 months ago
2008
ACM
This paper presents high-throughput techniques for implementing FSM based string matching hardware on FPGAs. By taking advantage of the fact that string matching operations for di...
187
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TVLSI
2008
15 years 6 months ago
2008
We present a Mutation-based Validation Paradigm (MVP) technology that can handle complete high-level microprocessor implementations and is based on explicit design error modeling, ...
174
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CODES
1996
IEEE
15 years 10 months ago
1996
IEEE
The design of multi-dimensional systems using hardware/software codesign allows a significant improvement in the development cycle. This paper presents a technique that enables a ...
135
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CGO
2008
IEEE
16 years 16 days ago
2008
IEEE
In the embedded domain, custom hardware in the form of ASICs is often used to implement critical parts of applications when performance and energy efficiency goals cannot be met ...