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ISLPED
2003
ACM
115views Hardware» more  ISLPED 2003»
16 years 4 days ago
Reducing energy and delay using efficient victim caches
In this paper, we investigate methods for improving the hit rates in the first level of memory hierarchy. Particularly, we propose victim cache structures to reduce the number of ...
Gokhan Memik, Glenn Reinman, William H. Mangione-S...
CODES
2008
IEEE
16 years 1 months ago
Intra- and inter-processor hybrid performance modeling for MPSoC architectures
The heterogeneity of modern MPSoC architectures, coupled with the increasing complexity of the applications mapped onto them has recently led to a lot of interest in hybrid perfor...
Frank E. B. Ophelders, Samarjit Chakraborty, Henk ...
DAC
1998
ACM
16 years 7 months ago
Rate Derivation and Its Applications to Reactive, Real-Time Embedded Systems
An embedded system the system continuously interacts with its environment under strict timing constraints, called the external constraints, and it is important to know how these e...
Ali Dasdan, Dinesh Ramanathan, Rajesh K. Gupta
DAC
2006
ACM
16 years 7 months ago
Process variation aware OPC with variational lithography modeling
Optical proximity correction (OPC) is one of the most widely used resolution enhancement techniques (RET) in nanometer designs to improve subwavelength printability. Conventional ...
Peng Yu, Sean X. Shi, David Z. Pan
FPGA
2010
ACM
250views FPGA» more  FPGA 2010»
16 years 3 months ago
Variation-aware placement for FPGAs with multi-cycle statistical timing analysis
Deep submicron processes have allowed FPGAs to grow in complexity and speed. However, such technology scaling has caused FPGAs to become more susceptible to the effects of process...
Gregory Lucas, Chen Dong, Deming Chen