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ICCAD
1998
IEEE
112views Hardware» more  ICCAD 1998»
15 years 11 months ago
Using precomputation in architecture and logic resynthesis
Abstract Althoughtremendousadvanceshave been accomplished in logic synthesis in the past two decades, in some cases logic synthesis still cannot attain the improvements possible by...
Soha Hassoun, Carl Ebeling
ISCA
1998
IEEE
139views Hardware» more  ISCA 1998»
15 years 11 months ago
Simultaneous Multithreading: Maximizing On-Chip Parallelism
This paper examines simultaneous multithreading, a technique permitting several independent threads to issue instructions to a superscalar's multiple functional units in a si...
Dean M. Tullsen, Susan J. Eggers, Henry M. Levy
ICCAD
1997
IEEE
90views Hardware» more  ICCAD 1997»
15 years 11 months ago
A hierarchical decomposition methodology for multistage clock circuits
† This paper describes a novel methodology to automate the design of the interconnect distribution for multistage clock circuits. We introduce two key ideas. First, a hierarchica...
Gary Ellis, Lawrence T. Pileggi, Rob A. Rutenbar
ISCA
1997
IEEE
137views Hardware» more  ISCA 1997»
15 years 11 months ago
A Language for Describing Predictors and Its Application to Automatic Synthesis
As processor architectures have increased their reliance on speculative execution to improve performance, the importance of accurate prediction of what to execute speculatively ha...
Joel S. Emer, Nicholas C. Gloy
ICECCS
1996
IEEE
109views Hardware» more  ICECCS 1996»
15 years 11 months ago
Dynamically Reconfigurable Embedded Software - Does It Make Sense?
A dynamically reconfigurable real-time software (DRRTS) paradigm can be used effectively in the design of embedded systems to provide many major advantages over conventional softw...
David B. Stewart, Gaurav Arora