2778 search results - page 397 / 556 » Reuse Technique in Hardware Design |
179
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DATE
2002
IEEE
15 years 12 months ago
2002
IEEE
The market demand for portable multimedia applications has exploded in the recent years. Unfortunately, for such applications current compilers and software optimization methods o...
199
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DATE
2000
IEEE
15 years 11 months ago
2000
IEEE
Traditional FPGA design flows have treated logic synthesis and physical design as separate steps. With the recent advances in technology, the lack of information on the physical ...
169
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VTS
2000
IEEE
15 years 11 months ago
2000
IEEE
A novel design-for-test (DFT) technique is presented for designing a core with a “virtual scan chain” which looks (to the system integrator) like it is shorter than the real s...
187
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ISLPED
1999
ACM
15 years 11 months ago
1999
ACM
Gating the clock is an important technique used in low power design to disable unused modules of a circuit. Gating can save power by both preventing unnecessary activiiy in the lo...
173
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ICCAD
1999
IEEE
15 years 11 months ago
1999
IEEE
Deep submicron technology calls for new design techniques, in which wire and gate delays are accounted to have equal or nearly equal effect on circuit behaviour. Asynchronous spee...