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» Reuse Technique in Hardware Design
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185
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ASPDAC
2008
ACM
122views Hardware» more  ASPDAC 2008»
15 years 8 months ago
Total power optimization combining placement, sizing and multi-Vt through slack distribution management
Power dissipation is quickly becoming one of the most important limiters in nanometer IC design for leakage increases exponentially as the technology scaling down. However, power ...
Tao Luo, David Newmark, David Z. Pan
239
Voted
ISCA
2012
IEEE
262views Hardware» more  ISCA 2012»
13 years 9 months ago
Boosting mobile GPU performance with a decoupled access/execute fragment processor
Smartphones represent one of the fastest growing markets, providing significant hardware/software improvements every few months. However, supporting these capabilities reduces the...
Jose-Maria Arnau, Joan-Manuel Parcerisa, Polychron...
173
Voted
ICCD
2008
IEEE
159views Hardware» more  ICCD 2008»
16 years 3 months ago
A high-performance parallel CAVLC encoder on a fine-grained many-core system
—This paper presents a high-performance parallel context-based adaptive length coding (CAVLC) encoder implemented on a fine-grained many-core system. The software encoder is desi...
Zhibin Xiao, Bevan Baas
ICCD
2006
IEEE
121views Hardware» more  ICCD 2006»
16 years 3 months ago
Power/ground supply network optimization for power-gating
-- Power-gating is a technique for efficiently reducing leakage power by shutting off the idle blocks. However, the presence of power-gating may also introduce negative effects on ...
Hailin Jiang, Malgorzata Marek-Sadowska
ICCAD
2007
IEEE
124views Hardware» more  ICCAD 2007»
16 years 3 months ago
Timing budgeting under arbitrary process variations
Timing budgeting under process variations is an important step in a statistical optimization flow. We propose a novel formulation of the problem where budgets are statistical ins...
Ruiming Chen, Hai Zhou