2778 search results - page 388 / 556 » Reuse Technique in Hardware Design |
210
click to vote
ASPDAC
2000
ACM
15 years 11 months ago
2000
ACM
Multilevel Fiduccia-Mattheyses MLFM hypergraph partitioning 3, 22, 24 is a fundamental optimization in VLSI CAD physical design. The leading implementation, hMetis 23 , has sinc...
171
click to vote
CPE
2000
Springer
15 years 11 months ago
2000
Springer
Abstract. Several tools have been developed for the estimation of software reliability. However, they are highly specialized in the approaches they implement and the particular pha...
181
click to vote
ASPDAC
2009
ACM
15 years 11 months ago
2009
ACM
Global routing is an important step for physical design. In this paper, we develop a new global router, NTUgr, that contains three major steps: prerouting, initial routing, and enh...
146
Voted
CAV
2010
Springer
15 years 10 months ago
2010
Springer
d Abstract) Benedikt Bollig1 , Joost-Pieter Katoen2 , Carsten Kern2 , Martin Leucker3 , Daniel Neider2 , and David R. Piegdon2 1 LSV, ENS Cachan, CNRS, 2 RWTH Aachen University, 3 ...
162
click to vote
DSD
2004
IEEE
15 years 10 months ago
2004
IEEE
Tile-based rendering (also called chunk rendering or bucket rendering) is a promising technique for low-power, 3D graphics platforms. This technique decomposes a scene into smalle...