2778 search results - page 385 / 556 » Reuse Technique in Hardware Design |
200
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
With the relentless scaling of semiconductor technology, the lifetime reliability of embedded multiprocessor platforms has become one of the major concerns for the industry. If th...
180
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DATE
2009
IEEE
16 years 1 months ago
2009
IEEE
— Technology scaling has caused the feature sizes to shrink continuously, whereas interconnects, unlike transistors, have not followed the same trend. Designing 3D stack architec...
194
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SASP
2009
IEEE
16 years 1 months ago
2009
IEEE
— In this paper, we present Parade, a novel and flexible parallel architecture for the deinterleaving of combined pulsetrains. This is a commonly performed task in various areas ...
161
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
Stream processing applications such as image signal processing demand high throughput. However, customers increasingly demand runtime flexibility in their designs, which cannot b...
179
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DATE
2008
IEEE
16 years 1 months ago
2008
IEEE
— Market and customer demands have continued to push the limits of CMOS performance. At-speed test has become a common method to ensure these high performance chips are being shi...