Sciweavers

2778 search results - page 383 / 556
» Reuse Technique in Hardware Design
Sort
View
ISCA
2007
IEEE
110views Hardware» more  ISCA 2007»
16 years 1 months ago
Late-binding: enabling unordered load-store queues
Conventional load/store queues (LSQs) are an impediment to both power-efficient execution in superscalar processors and scaling to large-window designs. In this paper, we propose...
Simha Sethumadhavan, Franziska Roesner, Joel S. Em...
ICES
2001
Springer
107views Hardware» more  ICES 2001»
15 years 11 months ago
Polymorphic Electronics
This paper introduces the concept of polymorphic electronics (polytronics) –referring to electronics with superimposed built-in functionality. A function change does not require ...
Adrian Stoica, Ricardo Salem Zebulum, Didier Keyme...
DAC
1997
ACM
15 years 11 months ago
Static Timing Analysis of Embedded Software
This paper examines the problem of statically analyzing the performance of embedded software. This problem is motivated by the increasing growth of embedded systems and a lack of ...
Sharad Malik, Margaret Martonosi, Yau-Tsun Steven ...
ASPLOS
2012
ACM
14 years 2 months ago
A case for unlimited watchpoints
Numerous tools have been proposed to help developers fix software errors and inefficiencies. Widely-used techniques such as memory checking suffer from overheads that limit thei...
Joseph L. Greathouse, Hongyi Xin, Yixin Luo, Todd ...
ICCD
2005
IEEE
100views Hardware» more  ICCD 2005»
16 years 3 months ago
Temporal Decomposition for Logic Optimization
Traditional approaches for sequential logic optimization include (1) explicit state-based techniques such as state minimization, (2) structural techniques such as retiming, and (3...
Nathan Kitchen, Andreas Kuehlmann