2778 search results - page 379 / 556 » Reuse Technique in Hardware Design |
212
click to vote
AUTOMATICA
2008
15 years 7 months ago
2008
Control systems are usually modeled by differential equations describing how physical phenomena can be influenced by certain control parameters or inputs. Although these models ar...
177
click to vote
DAC
2003
ACM
16 years 7 months ago
2003
ACM
Multiple clock cycles are needed to cross the global interconnects for multi-gigahertz designs in nanometer technologies. For synchronous designs, this requires retiming and pipel...
182
click to vote
DAC
2003
ACM
16 years 7 months ago
2003
ACM
Functional verification is widely acknowledged as the bottleneck in the hardware design cycle. This paper addresses one of the main challenges of simulation based verification (or...
171
click to vote
ICCAD
2006
IEEE
16 years 3 months ago
2006
IEEE
With the advent of deep sub-micron (DSM) era, floorplanning has become increasingly important in physical design process. In this paper we clarify a misunderstanding in using Lag...
191
click to vote
ISPD
2010
ACM
16 years 1 months ago
2010
ACM
Timing-driven placement is a critical step in nanometerscale physical synthesis. To improve design timing on a global scale, net-weight based global timing-driven placement is a c...