2778 search results - page 374 / 556 » Reuse Technique in Hardware Design |
150
click to vote
DAC
2004
ACM
16 years 8 days ago
2004
ACM
Considering layout effects early in the analog design process is becoming increasingly important. We propose techniques for estimating parasitic capacitances based on look-up tabl...
126
click to vote
NIME
2004
Springer
16 years 5 days ago
2004
Springer
A system is introduced that allows a string player to control a synthesis engine with the gestural skills he is used to. The implemented system is based on an electric viola and a...
146
click to vote
ISCAS
2003
IEEE
16 years 3 days ago
2003
IEEE
This paper presents a new family of architectures for multi-cycle area-efficient evaluation of elementary and composite functions, and an exploration of the design tradeoffs for i...
174
Voted
ECRTS
2000
IEEE
15 years 11 months ago
2000
IEEE
We present a tool for the design and validation of embedded real-time applications. The tool integrates two approaches, the use of the synchronous programming language ESTEREL for...
235
click to vote
ENTCS
2006
15 years 6 months ago
2006
Bounded Model Checking (BMC) searches for counterexamples to a property with a bounded length k. If no such counterexample is found, k is increased. This process terminates when ...