2778 search results - page 370 / 556 » Reuse Technique in Hardware Design |
151
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ISLPED
2003
ACM
16 years 1 days ago
2003
ACM
Many of the recently proposed techniques to reduce power consumption in caches introduce an additional level of nondeterminism in cache access latency. Due to this additional late...
173
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ISCC
2000
IEEE
15 years 11 months ago
2000
IEEE
Performance modeling and evaluation techniques are essential when designing and implementing distributed software systems. Constructing performance models for such systems can req...
183
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SIGCOMM
1994
ACM
15 years 11 months ago
1994
ACM
This paper describes our experiences, from a software perspective, with the OSIRIS network adaptor. It first identifies the problems we encountered while programming OSIRIS and op...
162
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CODES
2001
IEEE
15 years 10 months ago
2001
IEEE
This paper explores an application-specific customization technique for the data cache, one of the foremost area/power consuming and performance determining microarchitectural fea...
172
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MASCOTS
2007
15 years 8 months ago
2007
—Modern micro-architecture simulators are many orders of magnitude slower than the hardware they simulate. The use of multiprocessor architectures for supporting future mobile an...