2778 search results - page 363 / 556 » Reuse Technique in Hardware Design |
208
click to vote
FPGA
2001
ACM
15 years 11 months ago
2001
ACM
Discrete wavelet transformations (DWT) followed by embedded zerotree encoding is a very efficient technique for image compression [2, 5, 4]. However, the algorithms proposed in l...
193
click to vote
ISPD
1999
ACM
15 years 11 months ago
1999
ACM
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
201
click to vote
PACS
2000
Springer
15 years 10 months ago
2000
Springer
Increasing power dissipation has become a major constraint for future performance gains in the design of microprocessors. In this paper, we present the circuit design of an issue ...
160
click to vote
ISLPED
2007
ACM
15 years 8 months ago
2007
ACM
In this paper we propose a design methodology for low-power, high-performance, process-variation tolerant architecture for arithmetic units. The novelty of our approach lies in th...
175
Voted
ASAP
2007
IEEE
15 years 7 months ago
2007
IEEE
Commercial designs are integrating from 10 to 100 embedded functional and storage blocks in a single system on chip (SoC) currently, and the number is likely to increase significa...