2778 search results - page 356 / 556 » Reuse Technique in Hardware Design |
164
Voted
ISCA
2007
IEEE
16 years 1 months ago
2007
IEEE
ACE analysis is a technique to provide an early reliability estimate for microprocessors. ACE analysis couples data from performance models with low level design details to identi...
156
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ISCA
2007
IEEE
16 years 1 months ago
2007
IEEE
We introduce a novel chip fabrication technique called “brick and mortar”, in which chips are made from small, pre-fabricated ASIC bricks and bonded in a designer-specified a...
200
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ISPD
2005
ACM
16 years 10 days ago
2005
ACM
The sustained progress of VLSI technology has altered the landscape of routing which is a major physical design stage. For timing driven routings, traditional approaches which con...
178
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ASYNC
2002
IEEE
15 years 11 months ago
2002
IEEE
In a circuit environment that is becoming increasingly sensitive to dynamic power dissipation and noise, and where cycle time available for control decisions continues to decrease...
185
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ICCAD
1999
IEEE
15 years 11 months ago
1999
IEEE
This paper addresses the problem of efficient and accurate performance analysis to drive the exploration and design of bus-based System-on-Chip (SOC) communication architectures. ...