2778 search results - page 352 / 556 » Reuse Technique in Hardware Design |
190
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MICRO
2007
IEEE
16 years 1 months ago
2007
IEEE
In deep sub-micron ICs, growing amounts of ondie memory and scaling effects make embedded memories increasingly vulnerable to reliability and yield problems. As scaling progresses...
168
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DATE
2005
IEEE
16 years 11 days ago
2005
IEEE
Inductive cross-talk within IC packaging is becoming a significant bottleneck in high-speed inter-chip communication. The parasitic inductance within IC packaging causes bounce o...
155
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DATE
2003
IEEE
16 years 1 days ago
2003
IEEE
Modern embedded processors use data caches with higher and higher degrees of associativity in order to increase performance. A set–associative data cache consumes a significant...
175
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DATE
2003
IEEE
16 years 1 days ago
2003
IEEE
Data correlation is a well-known problem that causes difficulty in VLSI testing. Based on a correlation metric, an efficient heuristic to select BIST registers has been proposed...
156
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DATE
2002
IEEE
15 years 11 months ago
2002
IEEE
We have developed a technique to compute a Quasi Static Schedule of a concurrent specification for the software partition of an embedded system. Previous work did not take into a...