2778 search results - page 343 / 556 » Reuse Technique in Hardware Design |
193
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ISLPED
2009
ACM
16 years 1 months ago
2009
ACM
Many techniques for power management employed in advanced RTL synthesis tools rely explicitly or implicitly on observability don’t-care (ODC) conditions. In this paper we presen...
149
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AHS
2007
IEEE
16 years 1 months ago
2007
IEEE
Biological systems have inherent mechanisms which ensure their adaptation and thus survival — preservation of functionality, despite extreme and varying environments. One such e...
173
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DATE
2007
IEEE
16 years 1 months ago
2007
IEEE
— It has been the conventional assumption that, due to the superlinear dependence of leakage power consumption on temperature, and widely varying on-chip temperature profiles, a...
155
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DATE
2007
IEEE
16 years 1 months ago
2007
IEEE
This paper tackles the problem of dynamic power management (DPM) in nanoscale CMOS design technologies that are typically affected by increasing levels of process, voltage, and te...
151
Voted
DATE
2007
IEEE
16 years 1 months ago
2007
IEEE
Errors in timing closure process during the physical design stage may result in systematic silicon failures, such as scan chain hold time violations, which prohibit the test of ma...