2778 search results - page 339 / 556 » Reuse Technique in Hardware Design |
156
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ASPDAC
2008
ACM
15 years 8 months ago
2008
ACM
In nanometer regime, IC designs have to consider the impact of process variations, which is often indicated by manufacturing/parametric yield. This paper investigates a yield model...
147
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ASPDAC
2005
ACM
15 years 8 months ago
2005
ACM
In modern VLSI designs, the increasingly severe power problem requests to minimize clock routing wirelength so that both power consumption and power supply noise can be alleviated...
153
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ASPDAC
2005
ACM
15 years 8 months ago
2005
ACM
- It is important to model the substrate coupling for mixed-signal circuit designs today. This paper presents the direct boundary element method (BEM) for substrate resistance calc...
207
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DSD
2008
IEEE
15 years 8 months ago
2008
IEEE
We evaluate the leakage reduction for both instruction and data cache in presence of drowsy or decay techniques. We discovered that a filter cache, traditionally used for reducing...
137
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ISLPED
2007
ACM
15 years 8 months ago
2007
ACM
A 0.4-V UWB digital baseband processor has been fabricated in a standard-VT 90-nm CMOS technology. The baseband processor operates at an ultra-low supply voltage to reduce energy ...