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» Reuse Technique in Hardware Design
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ECBS
2007
IEEE
145views Hardware» more  ECBS 2007»
15 years 10 months ago
Automatic Verification and Performance Analysis of Time-Constrained SysML Activity Diagrams
We present in this paper a new approach for the automatic verification and performance analysis of SysML activity diagrams. Since timeliness is important in the design and analysi...
Yosr Jarraya, Andrei Soeanu, Mourad Debbabi, Fawzi...
CAV
2006
Springer
105views Hardware» more  CAV 2006»
15 years 10 months ago
FAST Extended Release
Fast is a tool designed for the analysis of counter systems, i.e. automata extended with unbounded integer variables. Despite the reachability set is not recursive in general, Fast...
Sébastien Bardin, Jérôme Lerou...
EH
2004
IEEE
89views Hardware» more  EH 2004»
15 years 10 months ago
Evolution in Materio: Initial Experiments with Liquid Crystal
Intrinsic evolution is often limited to using standard electronic components as the media for problem solving. It has been argued that because such components are human designed a...
Simon Harding, Julian Francis Miller
ECMDAFA
2006
Springer
142views Hardware» more  ECMDAFA 2006»
15 years 10 months ago
Ontology-Based Composition and Transformation for Model-Driven Service Architecture
Building service-based architectures has become a major area of interest since the advent of Web services. Modelling these architectures is a central activity. Model-driven archite...
Claus Pahl
ASPDAC
2001
ACM
83views Hardware» more  ASPDAC 2001»
15 years 10 months ago
Trace-driven system-level power evaluation of system-on-a-chip peripheral cores
Our earlier work for fast evaluation of power consumption of general cores in a system-on-a-chip described techniques that involved isolating high-level instructions of a core, me...
Tony Givargis, Frank Vahid, Jörg Henkel