Sciweavers

2778 search results - page 322 / 556
» Reuse Technique in Hardware Design
Sort
View
POPL
2000
ACM
15 years 10 months ago
Modular Refinement of Hierarchic Reactive Machines
with existing analysis tools. Modular reasoning principles such as abstraction, compositional refinement, and assume-guarantee reasoning are well understood for architectural hiera...
Rajeev Alur, Radu Grosu
ICCD
2006
IEEE
115views Hardware» more  ICCD 2006»
16 years 3 months ago
Long-term Performance Bottleneck Analysis and Prediction
— Identifying performance bottlenecks is important for microarchitects and application developers to produce high performance microprocessor designs and application software. Man...
Fei Gao, Suleyman Sair
ICCAD
2006
IEEE
106views Hardware» more  ICCAD 2006»
16 years 3 months ago
Wire density driven global routing for CMP variation and timing
In this paper, we propose the first wire density driven global routing that considers CMP variation and timing. To enable CMP awareness during global routing, we propose a compac...
Minsik Cho, David Z. Pan, Hua Xiang, Ruchir Puri
ARC
2009
Springer
188views Hardware» more  ARC 2009»
16 years 1 months ago
Word-Length Optimization and Error Analysis of a Multivariate Gaussian Random Number Generator
Abstract. Monte Carlo simulation is one of the most widely used techniques for computationally intensive simulations in mathematical analysis and modeling. A multivariate Gaussian ...
Chalermpol Saiprasert, Christos-Savvas Bouganis, G...
DATE
2009
IEEE
138views Hardware» more  DATE 2009»
16 years 1 months ago
Hardware/software co-design architecture for thermal management of chip multiprocessors
—The sustained push for performance, transistor count, and instruction level parallelism has reached a point where chip level power density issues are at the forefront of design ...
Omer Khan, Sandip Kundu