2778 search results - page 320 / 556 » Reuse Technique in Hardware Design |
189
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ISCA
2007
IEEE
16 years 29 days ago
2007
IEEE
The recently released SPEC CPU2006 benchmark suite is expected to be used by computer designers and computer architecture researchers for pre-silicon early design analysis. Partia...
155
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FPGA
2004
ACM
16 years 1 days ago
2004
ACM
We consider active leakage power dissipation in FPGAs and present a “no cost” approach for active leakage reduction. It is well-known that the leakage power consumed by a digi...
169
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DATE
2003
IEEE
15 years 12 months ago
2003
IEEE
– Floorplanning large designs with many hard macros and IP blocks of various sizes is becoming an increasingly important and challenging problem. This paper presents a global flo...
173
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DATE
2002
IEEE
15 years 11 months ago
2002
IEEE
This paper develops an improved approach for hierarchical functional test generation for complex chips. In order to deal with the increasing complexity of functional test generati...
172
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ICCAD
1994
IEEE
15 years 10 months ago
1994
IEEE
Application Specific Instruction-Set Processors (ASIPs) offer designers the ability for high-speed data and control processing with the added flexibility needed for late design sp...