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» Reuse Technique in Hardware Design
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ISPAN
2008
IEEE
16 years 1 months ago
A Taxonomy of Data Prefetching Mechanisms
Data prefetching has been considered an effective way to mask data access latency caused by cache misses and to bridge the performance gap between processor and memory. With hardw...
Surendra Byna, Yong Chen, Xian-He Sun
DAC
2010
ACM
15 years 6 months ago
Automatic multithreaded pipeline synthesis from transactional datapath specifications
We present a technique to automatically synthesize a multithreaded in-order pipeline from a high-level unpipelined datapath specification. This work extends the previously propose...
Eriko Nurvitadhi, James C. Hoe, Shih-Lien Lu, Timo...
ISCAS
2005
IEEE
179views Hardware» more  ISCAS 2005»
16 years 7 days ago
Robust stabilization of control systems using piecewise linear Lyapunov functions and evolutionary algorithm
— Piecewise linear Lyapunov functions are used to design control gain matrices so that closed systems are robust stable and attractive regions are expanded as large as possible i...
K. Tagawa, Y. Ohta
ICSE
2007
IEEE-ACM
16 years 6 months ago
Revel8or: Model Driven Capacity Planning Tool Suite
Designing complex multi-tier applications that must meet strict performance requirements is a challenging software engineering problem. Ideally, the application architect could de...
Liming Zhu, Yan Liu, Ngoc Bao Bui, Ian Gorton
GTTSE
2007
Springer
16 years 24 days ago
Model Transformations for the Compilation of Multi-processor Systems-on-Chip
With the increase of amount of transistors which can be contained on a chip and the constant expectation for more sophisticated applications, the design of Systems-on-Chip (SoC) is...
Éric Piel, Philippe Marquet, Jean-Luc Dekey...